Products
Engineered forthe mission.
From AI-powered signal enhancement to professional rackmount hardware, Apexia products are built to operate where performance is non-negotiable.
The Lineup
ApexSDR
8-channel coherent wideband SDR — 100 MHz IBW per channel, 40GbE, native multi-board coherence to 32 channels.
Meet ApexSDRBeta · Free DownloadApexia Fabric
Visual RF system design for RFSoC — node-graph signal chains, virtual scope simulation, CASPER toolflow deployment.
Download the betaIn DevelopmentNeuroRF
AI signal denoising — +11.3 dB measured mean SNR improvement on held-out test data, on hardware you already own.
Learn moreLicensableDSP IP Cores
CFAR, pulse compression, channelization, DDC, NCO/DDS, and MTS-aware ingest — delivered with verification harnesses.
See the coresComing SoonRFSoC Enclosures
1U/2U rackmount enclosures for the ZCU216 and RFSoC 4x2 — thermal management, front-panel I/O, tool-less install.
Join the waitlist
Flagship Product
NeuroRF
A convolutional denoising autoencoder that reconstructs clean waveforms from noisy IQ data.
NeuroRF is trained on synthetic signal–noise pairs and runs on the RF hardware you already own — as host software today, as an FPGA IP core on the roadmap. On a held-out test set of QPSK and 8-PSK signals at 3–10 dB SNR, it delivers a measured mean SNR improvement of +11.3 dB with no meaningful phase distortion.
Key Capabilities
Measured SNR Improvement
On a 256-window held-out test set — QPSK and 8-PSK in AWGN at 3–10 dB input SNR — NeuroRF improves measured SNR by +9.4 dB at the lowest input levels, rising to +13.7 dB at 10 dB. Phase bias under 1 degree.
Modulation Recovery
Denoising as the front stage for modulation classification and recovery. The current prototype trains directly on complex IQ data; recovery performance is active R&D, and numbers will be published when they clear our own benchmarks.
Zero Additional Hardware
Pure software/IP core solution that enhances existing RF infrastructure. No new antennas, amplifiers, or front-end modifications required.
FPGA Deployment
The prototype denoises a 2,032-sample IQ window in 3.9 ms on a desktop CPU. Real-time inference on RFSoC programmable logic is the design target; hardware latency figures will be published when measured on silicon.
Measured figures: IQ prototype model, 256-window held-out synthetic test set (seed-controlled, no overlap with training data), QPSK and 8-PSK at 4 samples/symbol, AWGN channel at 3–10 dB SNR. SNR improvement computed as 10·log₁₀(P_signal / P_residual) over the symbol region. CPU latency measured at batch 1; not an FPGA figure.
DSP IP Cores
Production-grade radar DSP, ready to integrate.
VHDL cores delivered with simulation harnesses and verification reports. Built for latency-deterministic operation on the Xilinx Zynq UltraScale+ RFSoC family. Licensable per-program or as part of a larger engagement.
CFAR Detection Cores
Constant False-Alarm Rate detection cores with CA-CFAR, OS-CFAR, and GO/SO-CFAR variants. Configurable guard / reference window depth, threshold scaling, and output formatting.
ZCU111 · ZCU208 · ZCU216 · RFSoC 4x2
Pulse Compression / Matched Filter
Latency-deterministic matched filter cores with NLFM-aware coefficient generation, configurable taps, and sidelobe-aware windowing. Streaming AXI4 interface.
Zynq UltraScale+ RFSoC family
Polyphase Channelizer
Wideband channelization core with configurable channel count, decimation ratio, and prototype filter design. Production-grade implementation with verification harness.
Zynq UltraScale+ RFSoC family
Digital Down-Conversion + Decimation
DDC chains with NCO-driven mixing, CIC plus FIR/FIR-halfband decimation stages, and bit-true Simulink reference for system-level verification.
Zynq UltraScale+ RFSoC family
NCO / DDS Reference Designs
High-spurious-free dynamic range numerically controlled oscillators and direct digital synthesis blocks. Dithered, tunable, and synthesis-portable.
Zynq UltraScale+ RFSoC family
MTS-Aware Multi-Channel Ingest
Reference design for multi-tile, multi-channel coherent ingest with MTS sequencing, per-channel calibration hooks, and AXI4-Stream output to PL fabric or DDR4.
ZCU208 · ZCU216 · RFSoC 4x2
Hardware
RFSoC Enclosures
Professional rackmountable enclosures that transform development boards into deployment-ready hardware. Board not included.
ZCU216 Enclosure
Compatible with Xilinx ZCU216
From $2,500
- 2U rackmount form factor
- Designed for Xilinx ZCU216 evaluation board
- Integrated thermal management system
- Front-panel I/O access
- Tool-less board installation
Running this board? Read the Xilinx ZCU216 field guide
RFSoC 4x2 Enclosure
Compatible with RealDigital RFSoC 4x2
From $2,500
- 1U compact rackmount form factor
- Designed for RealDigital RFSoC 4x2 board
- Optimized airflow design
- RF connector panel access
- Professional deployment ready
Running this board? Read the RealDigital RFSoC 4x2 field guide
Custom Solutions
Need something purpose-built?
Our engineering team designs custom enclosures, FPGA solutions, and AI integrations tailored to your specific platform and deployment requirements.