ENGINEERING INSIGHTS
Written fromthe bench, notthe textbook.
FPGA · DSP · AI/ML · RFSoC
Working notes on FPGA signal processing, AI/ML for RF, and RFSoC development.
ALL ARTICLESNEWEST FIRST
01
[ Founder Diary · CH 02 ]OCT 23, 2026 · 6 MIN READAn MVP You Can Finish: Scoping Fabric v0.1
Chapter 2 of the Apexia founder diary: what the first version of Fabric did, what it left out, and why propagating sample rates tells you the SNR you can expect.
- Founder Diary
- Apexia Fabric
- MVP
02
[ Founder Diary · CH 01 ]OCT 20, 2026 · 4 MIN READThe Itch: Why I Started Building Fabric
Chapter 1 of the Apexia founder diary: a folder of RFSoC scripts, a frequency plan nobody could see, and the idea that became Apexia Fabric.
- Founder Diary
- Apexia Fabric
- RFSoC
03
[ DSP ]JUL 25, 2026 · 9 MIN READDigital Down Conversion (DDC): A Practical Guide
How digital down conversion works: NCO mixing, CIC and FIR decimation, bit growth, aliasing, and when to use the RFSoC's hard DDC blocks instead of fabric.
- DDC
- DSP
- FPGA
04
[ FPGA ]APR 14, 2026 · 8 MIN READFPGA vs GPU for Real-Time Signal Processing
Why FPGAs deliver deterministic sub-microsecond latency for real-time DSP while GPUs win on batch throughput, with benchmarks and when to choose each.
- FPGA
- GPU
- Signal Processing